Alexandria Digital Research Library

Multi-Gigabit Reception with Time-interleaved Analog-to-Digital Converters

Author:
Ponnuru, Sandeep
Degree Grantor:
University of California, Santa Barbara. Electrical & Computer Engineering
Degree Supervisor:
upamanyu Madhow
Place of Publication:
[Santa Barbara, Calif.]
Publisher:
University of California, Santa Barbara
Creation Date:
2011
Issued Date:
2011
Topics:
Engineering, Electronics and Electrical
Keywords:
Interleaved
A/D.
Gigabit
Wireless
Communication
ADC
Genres:
Dissertations, Academic and Online resources
Dissertation:
Ph.D.--University of California, Santa Barbara, 2011
Description:

Moore's law drives the economies of scale in modern communication systems, with most receiver functionalities being implemented in digital signal processing (DSP) after analog to digital conversion. Extending the computational advantage provided by Moore's law to multi-Gigabit communication systems requires analog-to-digital converters (ADCs) with high sampling rate and output resolution.

A promising approach to realize such ADCs at reasonable power consumption is to employ a time- interleaved (TI) architecture with slower (but power-efficient) sub-ADCs in parallel. However, mismatch among the sub-ADCs, if left uncompensated, can cause error floors in receiver performance. Traditionally, mismatch is compensated either by employing larger transistors, by analog adjustments, or by dedicated digital mismatch compensation whose complexity increases with the desired resolution at the output of the TI-ADC. In this thesis, we investigate a novel approach, in which mismatch and channel dispersion are compensated jointly, with the performance metric being overall link reliability rather than ADC performance.

We first characterize the structure of mismatch-induced interference for an OFDM system, and demonstrate the efficacy of a frequency-domain interference suppression scheme whose complexity is independent of constellation size (which determines the desired resolution). Numerical results from computer simulation and from experiments on a hardware prototype show that the performance with the proposed joint mismatch and channel compensation technique is close to that without mismatch.

Next, we explore time-domain mismatch compensation approaches that scale with the number of sub-ADCs and the desired resolution. We show that low-complexity linear mismatch compensation is possible if we employ oversampling. We establish a strong analogy between the role of oversampling for mismatch compensation and for channel equalization, even though the structure of the interference due to mismatch is different from that due to a dispersive channel.

While the proposed compensation architectures work with offline estimates of mismatch parameters, we provide an iterative, online method for joint estimation of mismatch and channel parameters which leverages the training overhead already available in communication signals. We provide a closed form solution for each iteration, for both channel and mismatch estimates, based on a linear approximation for the nonlinear effect of timing mismatch. We investigate the scalability and convergence of this joint estimation algorithm, and derive rules of thumb relating the required length of pseudorandom training to the number of sub-ADCs. Further, we design periodic training sequences with significantly enhanced convergence rates.

Physical Description:
1 online resource (141 pages)
Format:
Text
Collection(s):
UCSB electronic theses and dissertations
ARK:
ark:/48907/f3gq6vpz
ISBN:
9781267194350
Catalog System Number:
990037519080203776
Rights:
Inc.icon only.dark In Copyright
Copyright Holder:
Sandeep Ponnuru
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